Watchdog timer prevents overflow reset program

The watchdog timer is used to prevent the program from running away due to the strong interference noise caused by the power supply, space electromagnetic interference or other reasons. The program is set to see TL = WDTPW + WDTCNTCL, when the program runs out of time can not clear the watchdog in time, causing the watchdog overflow reset, so that the program can return to normal operation.

1. Counting unit WDTCNT: WDTCNT is a 16-bit incrementing counter, and the fixed-cycle pulse signal generated by the clock circuit selected by the MSP430 adds the count to the counter.

Watchdog timer prevents overflow reset program

2. Control register WDTCTL: WDTCTL consists of two parts, the upper 8 bits are used as the password, ie 5AH (defined as WDTPW in the header file), and the lower 8 bits are the password WDTPW when the control command to the WDT operation is first written, and the password is wrongly written. Will cause the system to reset. Reading WDTCTL does not require a password, the value of the low-byte WDTCTL, high-byte readout is always 69H.

3. Make the WDT work in watchdog mode, timer mode and low power mode by setting the TMSEL and HOLD control bits in WDTCTL.

4.2. WDT The SSEL and IS0 IS1 3 bits can be used to determine the time associated with 8 clock sources (ACLK = 32768Hz, SMCLK = 1 MHz.

Use a watchdog timer to generate a square wave (periodically negates P1.0)

#include "MSP430x201x.h"

Void main(void)

{

WDT=WDT_MDLY_32;

IE1 |=WDTIE;

P1DIR |=0x01;

_EINT();

For(;;)

{

_BIS_SR(CPUOFF);

_NOP();

}

}

Interrupt[WDT_VECTOR] void watchdog_TImer(void)

{

P1OUT^=0x01;

}

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