When you research the specification of a new product, you sometimes think that it should meet all your needs; after all, it is a new product that has been improved. However, the reality is not the case. Perhaps, when you start implementing your project and trying to design your PCB, you find that the instructions don't have the information you really need. You can solve this problem in two ways: 1) Go back to the manufacturer and ask for the above information; or 2) Use the simulation model of the product to improve the content of the manual.
When you start PCB design, you need to address the signal integrity issues of digital pins. One of the many basic signal integrity factors you need is the input and output capacitance of a digital port. Such subtle data may be a dispensable item in the product manual. If not, you will need to measure the product sample. A better case is that you can get this information through the IBIS model.
In the IBIS model, the pin capacitance consists of two parts: the C_pin package capacitor plus the C_comp snubber capacitor (see Figure 1-2). In the IBIS model, the [Pin] keyword refers to a specific encapsulation, and the [Component], [Manufacturer], and [Package] keywords above the [Pin] keyword describe the selected encapsulation. You can find the package capacitor in the [Pin] keyword table because it is related to the pin you care about.
The input buffers of the Figure 1 IBIS model have package parasitics, ESD cells, and input gates.
The output buffer of the Figure 2 IBIS model has package parasitics and output gates.
For example, in the tsc2020.ibs model (Reference 1), the following list shows where the CDA pin value of the SDA package is located. When you are looking for relevant information, the "|" symbol in the IBIS model indicates that it is below the comment section. The C_pin value is 0.17059 pF.
[Component] tsc2020rtv
[Manufacturer] TI
[Package] | 32 WQFN - RTV package
[Pin] signal_name model_name R_pin L_pin C_pin
1 PINTDAV PINTDAV 0.07828 1.47274nH 0.16721pF
2 RESET RESET 0.06596 1.22611nH 0.17049pF
3 SDA SDA 0.06482 1.20340nH 0.17059pF
and many more
The second capacitor value is the C_comp value below the associated buffer [Model] keyword. Figure 8 in the model shows a C_comp example of the tsc2020.ibs file under the SDA_3 buffer. Here, the C_comp of the high impedance, low output mode is typically 2.7972710pF.
[Model] SDA_3
Model_type I/O_open_drain
| typ min max
| C_comp tri-state
|C_comp 2.7972710e-12 2.6509420e-12 2.9513260e-12
| C_comp high output
|C_comp 1.9121380e-11 2.2309670e-11 1.8775270e-11
| C_comp low output
C_comp 2.7972710e-12 2.9513260e-12 2.6509420e-12
If you add the C_pin value to the C_pin value, you can get the buffer input capacitance of the three-state configuration. For our example, the total input capacitance of the TSC2020 and SDA pins is 0.17059 pF plus 2.7972710 pF, which is about 2.97 pF.
Now, if the product you are considering is claiming to be a “new product†or an “improved†product, then the nominal data you see is far from what you need! If you are a standard product I am disappointed with the missing information in the manual. Please use the matching tools of the product.
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