The CD40192 is a synchronous decimal reversible counter with dual clock inputs and features such as clear and set, pinout and logic symbols as shown.
The functions of CD40192 (same as CC40192 74LS192) are shown in the table, as follows:
When the clear terminal CR is high level "1", the counter is directly cleared; when CR is low, other functions are performed.
When CR is low and the set terminal is also low, the data is placed directly into the counter from the set terminals J1, J2, J3, and J4.
Figure CD40192 pin arrangement diagram and logic symbol
Pin function: In the figure: LD (11-pin) - Set-end CU (5-pin) - Add count CD (4 pins) - Count down terminal C0 (12-pin) - Non-synchronous carry output B0 (13-pin) Non-synchronous borrowing output.
J1, J2, J3, J4 — Counter input. Q1, Q2, Q3, Q4 — Data output CR (14-pin) — Clear
When CR is low and LD is high, the count function is executed. When performing the up counting, the down counting terminal CD is connected to the high level, the counting pulse is input by the CU; and the 8421 code decimal addition counting is performed on the rising edge of the counting pulse. When performing the down counting, the counting terminal CU is connected to the high level, and the counting pulse is input by the down counting terminal CPD.
Table CD40192 function table
Input and output CRLDCPU CPD J4 J3 J2J1Q4Q3Q2Q11× × × × × × 000000× × dcbAdcba01↑ 1× × × × Addition count 011↑ × × × × Subtraction count
CD40192 pin diagram
Application Circuit Diagram: Non-Integer Programmable Pulse Divider
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